Info: Լ ....
Info: .
Info: (nl.sweep) ʼ ....
Info:  0 ڵ㱻 nl.sweep ɾ.
Info: (nl.sweep) .
WARN(NCHK315): Ԫ u1/fpga_ledb_r_reg 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ u1/fpga_ledg_r_reg 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ u1/fpga_ledr_r_reg 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ u1/state_reg[1] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ u1/state_reg[0] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ u2/address_reg[0] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ u2/address_reg[1] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ u2/address_reg[2] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ u2/address_reg[3] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ u2/address_reg[4] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ u2/address_reg[5] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ u2/address_reg[6] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ u2/address_reg[7] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ u2/address_reg[8] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ u1/cnt_acc/Q0/Q_reg[31] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ u1/cnt_acc/Q0/Q_reg[30] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ u1/cnt_acc/Q0/Q_reg[29] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ u1/cnt_acc/Q0/Q_reg[28] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ u1/cnt_acc/Q0/Q_reg[27] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ u1/cnt_acc/Q0/Q_reg[26] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ u1/cnt_acc/Q0/Q_reg[25] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ u1/cnt_acc/Q0/Q_reg[24] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ u1/cnt_acc/Q0/Q_reg[23] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ u1/cnt_acc/Q0/Q_reg[22] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ u1/cnt_acc/Q0/Q_reg[21] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ u1/cnt_acc/Q0/Q_reg[20] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ u1/cnt_acc/Q0/Q_reg[19] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ u1/cnt_acc/Q0/Q_reg[18] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ u1/cnt_acc/Q0/Q_reg[17] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ u1/cnt_acc/Q0/Q_reg[16] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ u1/cnt_acc/Q0/Q_reg[15] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ u1/cnt_acc/Q0/Q_reg[14] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ u1/cnt_acc/Q0/Q_reg[13] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ u1/cnt_acc/Q0/Q_reg[12] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ u1/cnt_acc/Q0/Q_reg[11] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ u1/cnt_acc/Q0/Q_reg[10] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ u1/cnt_acc/Q0/Q_reg[9] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ u1/cnt_acc/Q0/Q_reg[8] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ u1/cnt_acc/Q0/Q_reg[7] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ u1/cnt_acc/Q0/Q_reg[6] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ u1/cnt_acc/Q0/Q_reg[5] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ u1/cnt_acc/Q0/Q_reg[4] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ u1/cnt_acc/Q0/Q_reg[3] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ u1/cnt_acc/Q0/Q_reg[2] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ u1/cnt_acc/Q0/Q_reg[1] 첽ƹܽű߼ܱ߼ëӰ.
WARN(NCHK315): Ԫ u1/cnt_acc/Q0/Q_reg[0] 첽ƹܽű߼ܱ߼ëӰ.
#=============oOOOo================oOOOo=============
# װ(Packing)
#====================================================
Info: ʼװ(packing).
Info:  u2/address_reg[8] յ IREG.
Info:  u2/address_reg[7] յ IREG.
Info:  u2/address_reg[6] յ IREG.
Info:  u2/address_reg[5] յ IREG.
Info:  u2/address_reg[4] յ IREG.
Info:  u2/address_reg[3] յ IREG.
Info:  u2/address_reg[2] յ IREG.
Info:  u2/address_reg[1] յ IREG.
Info:  u2/address_reg[0] յ IREG.
Info:  u1/fpga_ledr_r_reg յ OREG.
Info:  u1/fpga_ledg_r_reg յ OREG.
Info:  u1/fpga_ledb_r_reg յ OREG.
Info:   Ϊ 26    PIO         .
Info:   Ϊ 12    IOLOGIC     .
Info:   Ϊ 1     EBR         .
Info:   Ϊ 41    SLICE       .
Info:  : 98%.
Info: ߼Ԫ(LE) : 121/24992 0%.
Info: SLICE                 65.
Info:     LOGIC             24.
Info:     CCU2              41.
Info: PIO                   26.
Info: IOLOGIC               12.
Info:     REG               12.
Info: EBR                    1.
Info:     DP8KC              1.
Info: װ.
Info: ʼ.
Info:   Ϊ 24    SLICE       .
Info: ɽ.
####
Info: װִʱ : 0 .
Info: 浽ļF:\temp\icore3l_demo\fpga_demo_0927\hq_run\icore3l_demo_map.rpt.
